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Figure 1 | EPJ Quantum Technology

Figure 1

From: Improved parameter targeting in 3D-integrated superconducting circuits through a polymer spacer process

Figure 1

Overview of the presented 3D-integration scheme. (a) Schematic of our flip-chip bonding architecture including polymer spacers (not to scale). (b) Photograph of a flip-chip-bonded module wire-bonded to a PCB. (c) Colorized optical micrograph of the bottom wiring chip and (d) top resonator chip featuring feedlines (blue), resonators (red) and SU-8 spacers (yellow). (e) Detail of an SU-8 spacer also showing indium bumps (green)

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