Figure 1From: Designs of the divider and special multiplier optimizing T and CNOT gatesImplementation circuits for (a) the Toffoli gate, (b) the Fredkin gate, (c) the Peres gate, and (d) an inverse-Peres gate named TR. Note: The circuit of the Toffoli gate has an error in [36], so we have modified the error in the dashed box 1 in (a)Back to article page