Figure 11From: Designs of the divider and special multiplier optimizing T and CNOT gatesThe circuits for (a) a 2-bit special multiplier and (b) a 3-bit special multiplier. The outputs \(\vert {{s_{3}}{s_{2}}{s_{1}}{s_{0}}} \rangle \) and \(\vert {{s_{5}}{s_{4}}{s_{3}}{s_{2}}{s_{1}}{s_{0}}} \rangle \) equal to \(\vert {ba} \rangle \), respectivelyBack to article page